Polycrystalline silicon, also called polysilicon, is a material consisting of small silicon crystals. It differs from single-crystal silicon, used for electronics and solar cells, and from amorphous silicon, used for thin film devices and solar cells.
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Before explaining the Poly Depletion Effect, one needs to know certain facts about the poly-silicon gate material of a MOSFET device. The gate contact may be of Polysilicon or metal, previously polysilicon was chosen over metal because the interfacing between polysilicon and gate oxide (Sio2) was favourable. But the conductivity of the poly-silicon layer is very low and because of this low conductivity, the charge accumulation is low, leading to a delay in channel formation and thus unwanted delays in circuits. To overcome this problem, we dope the poly layer with N-type or P-type impurity so as to make it behave like a perfect conductor.
Vgs = Voltage between Gate & Source
Vth = Threshold Voltage
N+ = Highly doped N region
Now in figure 1(a) it can be observed that the free majority carriers are scattered throughout the structure because of the absence of an external electric field. So what happens when we apply a positive field on the gate? The scattered carriers arrange themselves like figure 1(b), the electrons move closer toward the gate terminal but due to the open circuit configuration they don't start to flow. So there forms a depletion region on the polysilicon-oxide interface which has a direct effect on the channel formation in MOSFET.
So basically in an NMOS with n+ Polysilicon gate, the poly depletion effect aids in the channel formation by the combined effect of the (+)ve field of donor ions (ND) and the externally applied (+)ve field at gate terminal. Basically the accumulation of the (+)ve charged Donor ions (ND) on the polysilicon enhances the Formation of the inversion channel and when Vgs > Vth an inversion layer is formed which can be seen in the figure 1(b) where the inversion channel is formed of acceptor ions (NA) i.e. to say the minority carriers.
For many years metals were not used as gate contact material in MOS/CMOS devices; instead, conducting poly-Si was used due to the work function matching the work function of Si substrate (precondition for the low threshold voltage of an MOSFET). Metal contacts are re-introduced to the mainstream CMOS technology at the time when high-k dielectrics are replacing SiO2 as a gate oxide in cutting edge CMOS technology (poly-Si forms an SiOx layer at the interface with gate dielectric; also Fermi level pinning may occur).
So the effect with doped poly is an undesired reduction of threshold voltage which wasn't taken into account during circuit simulation. In order to avoid this kind of variation in vth of the MOSFET, at present metal gate is preferred over Polysilicon.